windows dispatcher, irql, paged

1.miniport state
http://msdn.microsoft.com/en-us/library/ms810029.aspx
http://msdn.microsoft.com/en-us/library/ff543701(v=vs.85).aspx
2.pnp state
http://www.phdcc.com/wdmarticle.html

handling irps

1.http://support.microsoft.com/kb/320275

windows stack function

1.a calling function pushes the arguments,stores the return address,previous esp value,jumps to
called function
2.called function stores stores the current stack frame ptr in esp and stores local variables in stack
3.when called function returns it invalidates local variables, uses stored ebp value and jumps to return address after invalidating arguments

windows dma another take

http://msdn.microsoft.com/en-us/library/ff540590(v=vs.85).aspx

1.wdm dma
uses IoGetDmaAdapter
DeviceDescription parameter in this determines map buffer or scatter gather method

2.map buffer dma
AllocateAdapterChannel uses user mode mdl request
it checks preallocated map registers
when dma is possible for the adapter, adapter routine is called
from adapter routine, map transfer for mdl,length is done.it returned the device logical address
the device logical address is programmed into the hardware
return deallocate adapter
for scatter gather simulation call maptransfer continuously,each map transfer is 1 map register,1 sge,maximum of num of map register for which maptransfer can be called depends on IoGetDmaAdapter
The above step is for single irp, and sequential processing

3.scatter gather dma
for a single irp driver calls getscattergatherlist,which invokes adapterlistcontrol routine
adapterlistcontrol has gets sgl,mapregisterbase

after a dma for current fdo is finished ,its map registers should be freed so that another fdo
in the system can do a allocateadapterchannel adaptercontrol callback

so dma hops from one fdo to another like isr searching entire system.

Also we can allocate a commonbuffer and skip adaptercontrol and do the dma directly.this is
because for common buffer we already get the device logical address(phy address),in former we
had to wait for the adapter control to get the map register and then call maptransfer to get the
device logical address

In get/setscattergatherlist method we can parallelly issue multiple getscattergatherlist and
then adapterlistcontrolgets called async,we process the sgl input and program the device

2.ndis dma
NdisMInitializescattergatherlist() if called uses get/setscattergatherlist method above.
otherwise, the first method is used.

A serialized nic uses NdisMAllocateMapRegisters
A deserialized one uses other

the first method allocates shared memory,copy data into shared memory,get map register using
NdisMStartBufferPhysicalMapping the resultant device logical address is programmed,maybe shared
memory address is directly used,output is similar to sgl but for single mdl

maptransfer gives output single mapregister entry with length.this can be multiple contiguous
physical page.the length of output is given in one of the parameters.

max dma size lso - 64k
max dma offld - 1mb

common windbg commands

1.!analyze -v
2.lm
3.!sym noisy
4..reload /n
5.bl,bp,bc
6.ld
7.x
8.http://windbg.info/doc/1-common-cmds.html#7_symbols
9.lm vm module -- timestamp
10.http://blogs.technet.com/b/marcelofartura/archive/2008/06/18/kernel-dump-analysis-bugcheck-1e-kmode-exception-not-handled.aspx
11.http://www.wd-3.com/archive/registercontext.htm
12.

At the start of called function:
1.push ebp ; Save the old stack base
2.mov ebp, esp ; Stack base becomes the current top of the stack
3.sub esp, 0xc ; Save space for local variables
4.mov eax, [ebp+8] ; example reference to one of the parameters
==========================================
1.http://www.technochakra.com/assembly-and-the-art-of-debugging/
==========================================

windows qos application

1.DSMark is supported only from vista
http://blogs.msdn.com/b/wndp/rss.aspx?Tags=QoS
2.DSMark in 2003
http://technet.microsoft.com/en-us/library/cc737728(WS.10).aspx
3.reflection in driver
http://blogs.msdn.com/b/wndp/archive/2007/09/07/detecting-802-1p-priority-tags.aspx
4.http://blogs.msdn.com/b/wndp/archive/tags/qos/
5.code for checking dscp and 802.1Q
http://read.pudn.com/downloads118/sourcecode/hack/501599/Priority_Inspection_LWF/src/filter/filter.c__.htm
6.Flow control snippet
http://blogs.msdn.com/b/wndp/rss.aspx
7.http://msdn.microsoft.com/en-us/library/aa374094(v=VS.85).aspx

windows paging

1.http://www.winvistatips.com/difference-between-pageable-memory-and-nonpageable-memory-t184356.html

skb usage

1.http://vger.kernel.org/~davem/skb_data.html
2.http://book.chinaunix.net/special/ebook/oreilly/Understanding_Linux_Network_Internals/0596002556/understandlni-CHP-2-SECT-1.html

kernel stack size

1. windows kernel
http://www.microsoft.com/whdc/driver/tips/kmstack.mspx
2.linux kernel
http://www.linuxquestions.org/questions/programming-9/does-the-linux-kernel-stack-size-fixed-417388/
3.wince
8k?

good c programming

1.http://geeksforgeeks.org/?p=2405

tap and tun in linux

1.http://backreference.org/2010/03/26/tuntap-interface-tutorial/

windows dma

1.http://blogs.msdn.com/b/peterwie/archive/2006/03/02/542517.aspx
2.http://blogs.msdn.com/b/peterwie/archive/2006/03/21/556624.aspx
3.http://www.osronline.com/article.cfm?article=539

windows self modifying code

1.http://support.microsoft.com/kb/127904
2.wbinvd - http://f.osdev.org/viewtopic.php?f=1&p=185436
3.cache prefetch - http://msdn.microsoft.com/en-us/library/ms684826(v=vs.85).aspx
4.Intel prefetch - http://lkml.indiana.edu/hypermail/linux/kernel/0109.3/0972.html
5.cache instructions pentium - http://flylib.com/books/en/2.630.1.134/1/
6.How cachegrind works
7.what cache instructios mean w.r.t code execution
we can insert a cache instruction anywhere between a piece of code.If the argument to cache instruction actually loads the next probable code or data beforehand its useful.
8.After a dma is completed to a buffer,it is only gurenteed that the data is present in the RAM.It might need to be brought to cache for processing.Its a good idea to bring its first cacheline to L2/L1 if we anticipate its processing.Assigning the pointer of that buffer to any local variable doesnt gurentee the above.
9.to understand the use of cache prefetches, imagine a while loop that uses a variable.whenever any member of that variable is used there are three possiblilities.the value is in ram,l2 or l1.so each access of the variable can have variable time of execution.if we are absolutely sure of the access pattern we can prefetch that variable into l1 cache if those values will be used immediately and into l2 cache if there can be a deferred use for eg: when a dpc is executed only that variables values are used(confirm this)

wince dma

0.http://blog.csdn.net/hugohong/archive/2009/05/28/4222880.aspx
1.http://support.microsoft.com/kb/299355
2.http://groups.google.com/group/microsoft.public.windowsce.platbuilder/browse_frm/thread/90975e5dd0887119/1e5539324ae5ad71?lnk=st&q&rnum=40&pli=1
3.cache routines in ce
http://msdn.microsoft.com/en-us/library/ms901761.aspx
4.http://us.generation-nt.com/arm-cache-flush-cache-invalidate-help-65004682.html
5.http://www.tech-archive.net/Archive/WindowsCE/microsoft.public.windowsce.embedded/2004-05/0175.html

software development - what can go wrong

1.redundencies - essential data structures are repeated at many places.But sometimes it becomes necessary to keep redundency for eg in protocol development an upper layer will need to maintain the states of the lower layer.The idea here is not optimization but necessity to physically isolate a layer that can even go into hardware from software space.
2.Incomplete understanding of system environment in which the software runs.for eg
multithreaded nature of entry points,semantics of the return values of entry points,presumption of a concept to be same as a similar one.eg tdi interface works only in synchronous mode,trying to use it as async.
3.function redundencies
4.trying to create monolithic design,need to create binaries that work together,clearly separated interfaces and datastructures
5.not caring about the dont do's of sw development
6.non focussed approach
7.not having roadmap
8.not packaging
9.not having test cases

top down and bottom up development

1.Top down - within a period of time, minimal demoable product is made.After each successive period more and more features is added.So at each interval demoable
product is present.Progress is measurable at each interval.Design changes doesnt waste effort too much.

2.Bottom up - First demoable product takes time.multiple units work parallelly to
develop all the features.Integration and testing takes time.After the first stage things will be fast.The design has to be perfect from start otherwise the work done
will be void.

3.For TD approach, first interval will have the framework ready with few features.
Rest of the system development will fall into placeholders of the framework.

4.For time estimation - When deciding to add a feature or modify a feature,find how many .c files .h files will be affected,how many functions will be affected, if it
spans across 5 files and 5 functions it will defenitely take 1 day cycle of modification,review,testing.If its a new feature addition again idea has to be gathered for its imapact on the number of .c and .h files and code addition,review,testing cycle,again for (5,5) it will take around 2 days(because of white space filling code addition).

5.types of modification - no data structure addition/deletion with code changes,data structure addition/deletion with code changes