1.http://blogs.msdn.com/b/peterwie/archive/2006/03/02/542517.aspx
2.http://blogs.msdn.com/b/peterwie/archive/2006/03/21/556624.aspx
3.http://www.osronline.com/article.cfm?article=539
Wednesday, January 5, 2011
windows self modifying code
1.http://support.microsoft.com/kb/127904
2.wbinvd - http://f.osdev.org/viewtopic.php?f=1&p=185436
3.cache prefetch - http://msdn.microsoft.com/en-us/library/ms684826(v=vs.85).aspx
4.Intel prefetch - http://lkml.indiana.edu/hypermail/linux/kernel/0109.3/0972.html
5.cache instructions pentium - http://flylib.com/books/en/2.630.1.134/1/
6.How cachegrind works
7.what cache instructios mean w.r.t code execution
we can insert a cache instruction anywhere between a piece of code.If the argument to cache instruction actually loads the next probable code or data beforehand its useful.
8.After a dma is completed to a buffer,it is only gurenteed that the data is present in the RAM.It might need to be brought to cache for processing.Its a good idea to bring its first cacheline to L2/L1 if we anticipate its processing.Assigning the pointer of that buffer to any local variable doesnt gurentee the above.
9.to understand the use of cache prefetches, imagine a while loop that uses a variable.whenever any member of that variable is used there are three possiblilities.the value is in ram,l2 or l1.so each access of the variable can have variable time of execution.if we are absolutely sure of the access pattern we can prefetch that variable into l1 cache if those values will be used immediately and into l2 cache if there can be a deferred use for eg: when a dpc is executed only that variables values are used(confirm this)
2.wbinvd - http://f.osdev.org/viewtopic.php?f=1&p=185436
3.cache prefetch - http://msdn.microsoft.com/en-us/library/ms684826(v=vs.85).aspx
4.Intel prefetch - http://lkml.indiana.edu/hypermail/linux/kernel/0109.3/0972.html
5.cache instructions pentium - http://flylib.com/books/en/2.630.1.134/1/
6.How cachegrind works
7.what cache instructios mean w.r.t code execution
we can insert a cache instruction anywhere between a piece of code.If the argument to cache instruction actually loads the next probable code or data beforehand its useful.
8.After a dma is completed to a buffer,it is only gurenteed that the data is present in the RAM.It might need to be brought to cache for processing.Its a good idea to bring its first cacheline to L2/L1 if we anticipate its processing.Assigning the pointer of that buffer to any local variable doesnt gurentee the above.
9.to understand the use of cache prefetches, imagine a while loop that uses a variable.whenever any member of that variable is used there are three possiblilities.the value is in ram,l2 or l1.so each access of the variable can have variable time of execution.if we are absolutely sure of the access pattern we can prefetch that variable into l1 cache if those values will be used immediately and into l2 cache if there can be a deferred use for eg: when a dpc is executed only that variables values are used(confirm this)
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