1.The main issue
compiler by default orders the instructions
optimizations may further reorder them
once the instructions get loaded into L1/L2 cache,then its rearranged by the core before
feeding into the cpu...here is where barrier comes into picture
A C code line should be converted to assembly,before we can decide whether we need to
use some kind of barrier or not
1.http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka14041.html
2.Memory barrier detailed
http://www.mjmwired.net/kernel/Documentation/memory-barriers.txt
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